CWE-1303 - Non-Transparent Sharing of Microarchitectural Resources
CWE-1303
- Abstraction:
- Base
- Structure:
- Simple
- Status:
- Draft
- Weakness Name
Non-Transparent Sharing of Microarchitectural Resources
- Description
Hardware structures shared across execution contexts (e.g., caches and branch predictors) can violate the expected architecture isolation between contexts.
Modern processors use techniques such as out-of-order execution, speculation, prefetching, data forwarding, and caching to increase performance. Details about the implementation of these techniques are hidden from the programmer's view. This is problematic when the hardware implementation of these techniques results in resources being shared across supposedly isolated contexts. Contention for shared resources between different contexts opens covert channels that allow malicious programs executing in one context to recover information from another context. Some examples of shared micro-architectural resources that have been used to leak information between contexts are caches, branch prediction logic, and load or store buffers. Speculative and out-of-order execution provides an attacker with increased control over which data is leaked through the covert channel. If the extent of resource sharing between contexts in the design microarchitecture is undocumented, it is extremely difficult to ensure system assets are protected against disclosure.
- Common Consequences
Scope: Confidentiality
Impact: Read Application Data, Read Memory
Notes: Microarchitectural side-channels have been used to leak specific information such as cryptographic keys, and Address Space Layout Randomization (ALSR) offsets as well as arbitrary memory.
- Related Weaknesses
- Release Date:
- 2020-08-20
- Latest Modification Date:
- 2023-06-29
Free security scan for your website